IEEE International Symposium on Circuits and Systems (ISCAS), May 2024.
Intelligent Systems Lab.
Ulsan National Institute of Science and Technology
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DPIM: A 19.36TOPS/W 2T1C eDRAM Transformer-in-Memory Chip with Sparsity-Aware Quantization and Heterogeneous Dense-Sparse Core
International ConferencesIEEE European Solid-State Electronics Research Conference (ESSERC), September 2024. (Accepted)
A 0.81 mJ/frame, Real-time LiDAR Odometry and Mapping Processor with Memory-efficient KNN and Reconfigurable Architecture
International ConferencesIEEE European Solid-State Electronics Research Conference (ESSERC), September 2024. (Accepted)
A Real-time Sparsity-aware 3D-CNN Processor for Mobile Hand Gesture Recognition
International JournalsIEEE Transactions on Circuits and Systems I (T-CAS I)
An Energy-Efficient 3D Point Neural Network Accelerator with Fine-grained LiDAR-SoC Pipeline Structure
International ConferencesACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), August 2024. (Accepted)
LSPU: A 20.7ms Low-latency Point Neural Network-based 3D Perception and Semantic LiDAR SLAM System-on-Chip for Autonomous Driving System
International ConferencesIEEE Symposium on High Performance Chips (Hotchips), August 2024 (Accepted)
applied for Korean Patent No. 10-2023-0180084, December 12, 2023.
applied for Korean Patent No. 10-2023-0175539, December 06, 2023.
applied for Korean Patent No.10-2023-0142830, October 24, 2023.
applied for Korean Patent No. 10-2023-0033723, March 15, 2023.
A Low-power and Real-time Semantic LiDAR-SLAM Processor with Point Neural Network Segmentation and kNN Acceleration for Mobile Robots
International ConferencesIEEE Symposium on Low-Power and High-Speed Chips and Systems (COOLCHIPS 27), April 2024.
A 422.1 Mpixels/J Tile-based 4K Super Resolution Processor with Variable Bit Compression
International ConferencesA Low-power 3D Point Clouds Matching Processor with 1D-CNN Prediction and CAM-based In-memory kNN Searching
International ConferencesIEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Apirl 2024.
IEEE European Conference on Antennas and Propagation (EuCAP), March 2024.
An Energy-Efficient, Unified CNN Accelerator for Real-Time Multi-Object Semantic Segmentation for Autonomous Vehicle
International JournalsIEEE Transactions on Circuits and Systems I (T-CAS I): Regular Papers, vol. 71, no. 5, pp. 2093-2104, May 2024.
LSPU: A Fully-Integrated Real-Time LiDAR-SLAM SoC with Point-Neural-Network Segmentation and Multi-level kNN Acceleration
International ConferencesIEEE International Solid-State Circuits Conference (ISSCC), February 2024.
제 6회 반도체공학회 종합학술대회, Dec, 2023
제 6회 반도체공학회 종합학술대회, Dec, 2023
제 6회 반도체공학회 종합학술대회, Dec, 2023
제 23회 RF/아날로그 회로 워크샵, September, 2023
FMCW Radar-Based Hand Gesture Recognition with Novel Time-Spectrograms and Lightweight Convolutional Neural Network for Mobile Device
International ConferencesIEEE International Conference on Electronics, Information, and Communication (ICEIC), January 2024.
IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), January 2024
IEEE/IEIE International Conference on Consumer Electronics Asia (ICCE-Asia), October 2023
Millimeter-Wave Display-Integrated FMCW Radar for Hand Gesture Recognition in Mobile Devices
International ConferencesJ. Heo, S. Kim, Kyuho Lee, Keseo Kim, Jaeuk Choi, and Gangil Byun
“Millimeter-Wave Display-Integrated FMCW Radar for Hand Gesture Recognition in Mobile Devices”
IEEE International Symposium on Antennas and Propagation (ISAP), October 2023.
A 701.7 TOPS/W Time-Domain Spiking Neural Network Compute-in-Memory Processor with 9T1C Bitcell
International ConferencesEEE International Midwest Symposium on Circuits and Systems (MWSCAS) (Accepted for oral presentation)
대한전자공학회 하계종합학술대회, June, 2023.
A Ternary Neural Network Computing-in-Memory Processor with 16T1C Bitcell Architecture
International JournalsIEEE Transactions on Circuits and Systems II (T-CAS II): Express Briefs
A Ternary Neural Network Computing-in-Memory Processor with 16T1C Bitcell Architecture
International ConferencesIEEE International Symposium on Circuits and Systems (ISCAS), May 2023. (Accepted)
제 5회 반도체공학회 종합학술대회 및 정기총회, 12월 2022.
Real-time Lightweight 3D-CNN and Sparsity-Aware Processor for Mobile Hand Gesture Recognition
Domestic Conferences제 5회 반도체공학회 종합학술대회 및 정기총회, 12월 2022.
A Real-Time Sparsity-Aware 3D-CNN Processor for Mobile Hand Gesture Recognition
International ConferencesIEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), June 2022.
An Energy-Efficient CNN Accelerator for Multi-object Real-Time Semantic Segmentation in Autonomous Vehicle
International ConferencesIEEE International Symposium on Circuits and Systems (ISCAS), May 2022. (Accepted)
applied for USA Patent No. 17.588,686, December 22, 2021.
IEEE International SoC Design Conference (ISOCC), October 2021.
Advances in Computers, Elsevier, vol. 122, pp. 217-245, April 2021.
IEEE Transactions on Circuits and Systems I (T-CAS I): Regular Papers, vol. 67, no. 12, pp. 4719-4732, December 2020.
IEEE Asilomar Conference on Signals, Systems, and Computers (ACSSC), November 2020.
A 9.52 ms Latency, and Low-power Streaming Depth-estimation Processor with Shifter-based Pipelined Architecture for Smart Mobile Devices
International JournalsJournal of Semiconductor Technology and Science (JSTS), vol. 20, no. 3, pp. 255-270, June 2020.
17.3 A −58dBc-Worst-Fractional-Spur and −234dB-FoMjitter, 5.5GHz Ring-DCO-Based Fractional-N DPLL Using a Time-Invariant-Probability Modulator, Generating a Nonlinearity-Robust DTC-Control Word
International ConferencesIEEE International Solid-State Circuits Conference (ISSCC), February 2020.
Nature Electronics (Nat. Electron), vol. 2, issue 7, pp. 307-312, July 2019.
A Low-power, Mixed-mode Neural Network Classifier for Robust Scene Classification
International JournalsJournal of Semiconductor Technology and Science (JSTS), vol. 19, no. 1, pp. 129-136, February 2019.
A 9.02mW CNN-Stereo Based Real-Time 3D Hand Gesture Recognition Processor for Smart Mobile Devices
International ConferencesIEEE International Solid-State Circuits Conference (ISSCC), February 2018.
A 1.4mW-Sensitivity 94-dB Dynamic-Range Electrical Impedance Tomography SoC and 48-Channel Hub-SoC for 3-D Lung Ventilation Monitoring System
International JournalsIEEE Journal of Solid-State Circuits (JSSC), vol. 52, no. 11, pp. 2829-2842, October 2017.
An Ultra-Low-Power and Mixed-Mode Event-Driven Face Detection SoC for Always-on Mobile Applications
International ConferencesIEEE European Solid-State Circuits Conference (ESSCIRC), September 2017.
IEEE International System-on-Chip Conference (SOCC), September 2017.
A 82-nW Chaotic Map True Random Number Generator Based on a Sub-Ranging SAR ADC
International JournalsIEEE Journal of Solid-State Circuits (JSSC), vol. 52, no. 7, pp. 1953-1965, July 2017.
A Real-Time and Energy-Efficient Embedded System for Intelligent ADAS with RNN-Based Deep Risk Prediction using Stereo Camera
International ConferencesProceedings of International Conference on Computer Vision Systems (ICVS), July, 2017.
A 31.2pJ/disparity/pixel Stereo Matching Processor with Stereo SRAM for Mobile UI Application
International ConferencesIEEE Symposium on VLSI Circuits (S. VLSI), June, 2017.
A 502GOPS and 0.984mW Dual-mode Intelligent ADAS SoC with Real-Time Semi-Global Matching and Intention Prediction for Smart Automotive Black Box System
International JournalsIEEE Journal of Solid-State Circuits (JSSC), vol. 52, no. 1, pp. 139-150, January 2017.
A CMOS Image Sensor-based Stereo Matching Accelerator with Focal-plane Rectification and Analog Census Transform
International JournalsIEEE Transactions on Circuits and Systems I (T-CAS I): Regular Papers, vol. 63, no. 12, pp. 2180-2188, December 2016.
A 82nW Chaotic-Map True Random Number Generator Based on Sub-Ranging SAR ADC
International ConferencesIEEE European Solid-State Circuits Conference (ESSCIRC), September, 2016.
An Intelligent ADAS Processor with Real-Time Semi-Global Matching and Intention Prediction for 720p Stereo Vision
International ConferencesIEEE Symposium on High Performance Chips (HOTCHIPS XXVIII), August, 2016.
An Energy-Efficient Parallel Multi-Core ADAS Processor with Robust Visual Attention and Workload-Prediction DVFS for Real-Time HD Stereo Stream
International ConferencesIEEE Symposium in Low-Power and High-Speed Chips (COOLCHIPS XIX), April, 2016.
A 502GOPS and 0.984mW Dual-mode ADAS SoC with RNN-FIS Engine for Intention Prediction in Automotive Black Box System
International ConferencesIEEE International Solid-State Circuits Conference (ISSCC), February, 2016.
A 2.71nJ/Pixel Gaze-Activated Object Recognition System for Low-power Mobile Smart Glasses
International JournalsIEEE Journal of Solid-State Circuits (JSSC), vol. 51, no. 1, pp. 45-55, January 2016.
A 79pJ/b 80Mb/s Full-Duplex Transceiver and a 42.5mW 100kb/s Super-Regenerative Transceiver for Body Channel Communication
International JournalsIEEE Journal of Solid-State Circuits (JSSC), vol. 51, no. 1, pp. 310-317, January 2016.
Intelligent Task Scheduler with High Throughput NoC for Real-Time Mobile Object Recognition SoC
International ConferencesIEEE European Solid-State Circuits Conference (ESSCIRC), September, 2015.
A Vocabulary Forest Object Matching Processor with 2.07 M-vector/s Throughput and 13.3 nJ/vector Per-Vector Energy for Full-HD 60 fps Video Object Recognition
International JournalsIEEE Journal of Solid-State Circuits (JSSC), vol. 50, no. 4, pp. 1059-1069, April 2015.
A Keypoint-level Parallel Pipelined Object Recognition Processor with Gaze Activation Image Sensor for Mobile Smart Glasses System
International ConferencesIEEE Symposium in Low-Power and High-Speed Chips (COOLCHIPS XVIII), April, 2015.
A 2.71nJ/Pixel 3D-Stacked Gaze-Activated Object Recognition System for Low-power Mobile HMD Applications
International ConferencesIEEE International Solid-State Circuits Conference (ISSCC), February, 2015.
A 1.22 TOPS and 1.52mW/MHz Augmented Reality Multi-Core Processor with Neural Network NoC for HMD Applications
International JournalsIEEE Journal of Solid-State Circuits (JSSC), vol. 50, no. 1, pp. 113-124, January 2015.
An Augmented Reality Processor with a Congestion-Aware Network-on-Chip Scheduler
International JournalsIEEE MICRO, vol. 34, no. 6, pp. 31-41, November-December 2014.
A Vocabulary Forest-based Object Matching Processor with 2.07M-vec/s Throughput and 13.3nJ/vector Energy in Full-HD Resolution
International ConferencesIEEE Symposium on VLSI Circuits (S. VLSI), June, 2014.
A Task-level Pipelined Many-SIMD Augmented Reality Processor with Congestion-aware Network-on-Chip Scheduler
International ConferencesIEEE Symposium in Low-Power and High-Speed Chips (COOLCHIPS XVII), April, 2014.
A 1.22 TOPS and 1.52mW/MHz Augmented Reality Multi-Core Processor with Neural Network NoC for HMD Applications
International ConferencesIEEE International Solid-State Circuits Conference (ISSCC), February, 2014.
filed to Korean Patent NO.10-1356786, January 21, 2014.
A Multi-Modal and Tunable Radial-Basis-Function Circuit with Supply and Temperature Compensation
International Conferenceshttps://ieeexplore.ieee.org/document/6572169
IEEE International Symposium on Circuits and Systems (ISCAS), May, 2013.
A Multi-granularity Parallelism Object Recognition Processor with Content-aware Fine-grained Task Scheduling
International ConferencesIEEE Symposium in Low-Power and High-Speed Chips (COOLCHIPS XVI), April, 2013.